Transmitting/receiving apparatus and method for packet retransmission in a mobile communication system

ABSTRACT

A transmitting/receiving apparatus and method for packet retransmission in a mobile communication system. Upon request for a retransmission from a receiver, a transmitter generates first coded bits by inverting initially transmitted coded bits, generates second coded bits by separating the initially transmitted coded bits into a first bit group having a relatively high priority and a second bit group having a relatively low priority and exchanging the first bit group with the second bit group, and generates third coded bits by inverting the exchanged coded bits. The transmitter selects one of the first coded bits, the second coded bits according to the sequence number of a retransmission request received from the receiver, and the third coded bits and maps the selected coded bits to modulation symbols. The transmitter then transmits the modulation symbols to the receiver.

PRIORITY

[0001] This application claims priority to an application entitled“Transmitting/Receiving Apparatus and Method for Packet Retransmissionin a Mobile Communication System” filed in the Korean IndustrialProperty Office on Oct. 31, 2001 and assigned Serial No. 2001-67694, thecontents of which are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates generally to a W-CDMA (Wide-bandCode Division Multiple Access) mobile communication system, and inparticular, to a transmitting/receiving apparatus and method forreducing a transmission error rate and thus increasing decodingperformance at retransmission.

[0004] 2. Description of the Related Art

[0005] Adverse influences on high-speed, high-quality data service areattributed to a channel environment in a mobile communication system.The radio channel environment varies frequently because of signal powerchanges caused by white noise and fading, shadowing, the Doppler effectthat occurs due to the movement and frequent velocity change of aterminal, and interference from other users and multi-path signals.Therefore, aside from conventional technologies in the second or thirdgeneration mobile communication system, an advanced technique isrequired to support wireless high-speed data packet service. In thiscontext, the 3GPP (3^(rd) Generation Partnership Project) and the 3GPP2commonly addressed the techniques of AMCS (Adaptive Modulation & CodingScheme) and HARQ (Hybrid Automatic Repeat Request).

[0006] The AMCS adjusts a modulation order and a code rate according tochanges in downlink channel condition. The downlink channel quality isusually obtained by measuring the SNR (Signal-to-Noise Ratio) of areceived signal at a UE (User Equipment). The UE transmits the channelquality information to a BS (Base Station) on an uplink. Then the BSestimates the downlink channel condition based on the channel qualityinformation and determines an appropriate modulation scheme and coderate according to the estimated downlink channel condition.

[0007] QPSK (Quadrature Phase Shift Keying), 8PSK (8-ary PSK), and 16QAM(16-ary Quadrature Amplitude Modulation) and code rates of ½ and ¼ areconsidered in the current high-speed wireless data packet communicationsystem. In AMCS, a BS applies a high-order modulation (e.g., 16QAM and64QAM) and a high code rate of ¾ to a UE having good channel qualitysuch as its adjacent UEs, and a low-order modulation (e.g., 8PSK andQPSK) and a low code rate of ½ to a UE having bad channel quality suchas a UE at a cell boundary. The AMCS reduces interference signalsremarkably and improves system performance, as compared to theconventional method relying on high-speed power control.

[0008] HARQ is a retransmission control technique to correct errors ininitially transmitted data packets. Schemes for implementing HARQinclude chase combining (CC), full incremental redundancy (FIR), andpartial incremental redundancy (PIR).

[0009] With CC, the entire initial transmission packet includingsystematic bits and parity bits is retransmitted. A receiver combinesthe retransmission packet with the initial transmission packet stored ina reception buffer. The resulting increase of the transmissionreliability of coded bits input to a decoder brings the performance gainof the overall mobile communication system. An approximate 3-dBperformance gain is effected on average since combining of the same twopackets is equivalent to repeated coding of the packet.

[0010] In FIR, a packet having only parity bits, different from aninitial transmission packet, is retransmitted to thereby increase adecoding gain. A decoder decodes data using the new parity bits as wellas initially transmitted systematic and parity bits. As a result,decoding performance is improved. It is well known in coding theory thata higher performance gain is yielded at a low code rate than by repeatedcoding. Therefore, FIR is superior to CC in terms of performance gain.

[0011] As compared to FIR, PIR is a retransmission scheme in which apacket having systematic bits and new parity bits is retransmitted. Areceiver combines the retransmitted systematic bits with initiallytransmitted systematic bits for decoding, achieving similar effects tothose of CC. PIR is also similar to FIR in that the new parity bits areused for decoding. Since PIR is implemented at a relatively high coderate than FIR, PIR is in the middle of FIR and CC in performance.

[0012] A combined use of the independent techniques of increasingadaptability to varying channel condition, AMCS and HARQ can improvesystem performance significantly.

[0013]FIG. 1 is a block diagram of a transmitter in a typical high-speedwireless data packet communication system. Referring to FIG. 1, thetransmitter includes a channel encoder 110, a rate matching controller120, an interleaver 130, a modulator 140, and a controller 150.

[0014] Upon input of information bits in transport blocks of size N, thechannel encoder 110 encodes the information bits at a code rate R (=n/k,n and k are prime), for example, ½ or ¾. With the code rate R, thechannel encoder 110 outputs n coded bits for the input of k informationbits. The channel encoder 110 can support a plurality of code ratesusing a mother code rate of ⅙ or ⅕ through symbol puncturing or symbolrepetition. The controller 150 controls the code rate.

[0015] The future mobile communication system adopts turbo codingconsidered a more robust channel coding technique for high-speedreliable transmission of multimedia data. It is known that turbo codinghas the nearest Shannon Limit performance in BER (Bit Error Rate) at alow SNR. Turbo coding is also adopted in the 1×EV-DV (Evolution in Dataand Voice) standards which are under discussion in the 3GPP and 3GPP2.

[0016] The output of the channel encoder 110 being a turbo encoderincludes systematic bits and parity bits. The systematic bits areinformation bits to be transmitted and the parity bits are errorcorrection bits added to the information bits for a receiver to correcterrors generated during transmission of the information bits atdecoding.

[0017] The rate matching controller 120 generally matches the data rateof the coded bits generally by transport channel-multiplexing, or byrepetition and puncturing if the number of the coded bits is differentfrom that of bits transmitted in the air. To minimize data loss causedby burst errors, the interleaver 130 interleaves the rate-matched bits.Interleaving distributes damaged bits in a fading environment.Therefore, the interleaving allows adjacent bits to be randomlyinfluenced by fading and thus prevents burst errors, increasing channelencoding performance. The modulator 140 maps the interleaved bits tosymbols in a modulation scheme determined by the controller 150.

[0018] The controller 150 selects the code rate and the modulationscheme according to the radio downlink channel condition. To selectivelyuse QPSK, 8PSK, 16QAM, and 64QAM according to the radio environment, thecontroller 150 supports AMCS. Though not shown, a UE spreads themodulated data with a plurality of Walsh codes to identify transportchannels and with a PN (Pseudorandom Noise) code to identify a BS.

[0019] As stated before, the modulator 140 supports various modulationschemes including QPSK, 8PSK, 16QAM and 64QAM with respect to theinterleaved bits. As a modulation order increases, the number of bits inone modulation symbol increases. Particularly in a higher-ordermodulation scheme greater than 8PSK, one modulation symbol includesthree or more bits. In this case, bits mapped to one modulation symbolhave different transmission reliabilities according to their positions.

[0020] With regard to transmission reliability, two bits of a modulationsymbol representing a macro region defined by left/right and up/downhave a relatively high reliability in an I (In Phase)-Q (QuadraturePhase) signal constellation. The other bits representing a micro regionwithin the macro region have a relatively low reliability.

[0021]FIG. 2 illustrates an exemplary signal constellation in 16QAM.Referring to FIG. 2, one 16QAM modulation symbol contains 4 bits [i1,q1, i2, q2] in a reliability pattern [H, H, L, L] (H denotes highreliability and L denotes low reliability). That is, the two upper bits[i1, q1] have a relatively high reliability and the two lower bits [i2,q2], a relatively low reliability. One 64QAM modulation symbol contains6 bits [i1, q1, i2, q2, i3, q3] in a reliability pattern [H, H, M, M, L,L] (M denotes medium reliability). Similarly, an 8PSK modulation symbolcontains 3 bits. One of them has a lower reliability than the other twobits. Thus, a reliability pattern is [H, H, L].

[0022] Considering the above reliability patterns, it is preferable tomap coded bits output from the channel encoder 110 to regions havingdifferent reliabilities according to their significance levels. Asstated before, the coded bits are divided into systematic bits andparity bits having different priority levels. In other words, if errorsare generated at different rates in a transport channel according to thereliabilities, a receiver can recover original bits more accurately bydecoding when the parity bits have errors than when the systematic bitshave errors because the systematic bits are actual information and theparity bits are error correction bits.

[0023] In this context, SMP (Symbol Mapping method based on Priority)has been proposed in which systematic bits are mapped to a highreliability region and parity bits are mapped to a low reliabilityregion, so that the error rate of the relatively significant systematicbits can be decreased.

[0024] Aside from the different reliabilities of coded bits, eachmodulation symbol is transmitted with a different error rate on a radiochannel in a modulation scheme having a modulation order equal to higherthan 16QAM. For example, in the signal constellation for 16QAM, 4 codedbits form one modulation symbol and are mapped to one of 16 signalpoints. The 16 signal points are classified into three regions accordingto their error rates. As a modulation symbol is farther along a real orimaginary number axis, it has a lower error rate, which means that thereceiver identifies the modulation symbol more easily.

[0025]FIG. 3 illustrates graphs showing the error probabilities of theregions in a simulation under an AWGN (Additive White Gaussian Noise)environment. As shown in FIG. 2, the 16 modulation symbols areclassified into region 1 having a high error probability, region 2having a medium error probability, and region 3 having a low errorprobability. For example, modulation symbols 6, 7, 10 and 11 in region 1have a relatively high error probability.

[0026] In packet data retransmission by HARQ, therefore, retransmissionwith the same reliability and/or error probability as that of initialtransmission does not increase retransmission efficiency. Retransmissionof specific bits with a consistently low reliability and/or high errorprobability deteriorates decoding performance since a channel decoderbeing a turbo decoder has good decoding performance when the LLRs (LogLikelihood Ratios) of input bits are homogeneous. Therefore, there is aneed for exploring a novel retransmission technique that improvestransmission performance at retransmission.

[0027] Techniques for improving transmission performance atretransmission include SRRC (Shifted Retransmission for ReliabilityCompensation) and BIR (Bit Inverted Retransmission). In the SSRC, thecoded bits of a modulation symbol are shifted by a predetermined numberof bits, for example, two bits and thus mapped to different reliabilityparts at a retransmission from those at their initial transmission. Inthe BIR, the coded bits are inverted and thus mapped to different errorprobability parts at a retransmission from those at the initialtransmission. Those techniques commonly comprise the LLRs of bits inputto a turbo decoder and thus improve decoding performance.

[0028] To describe the SRRC in more detail, an M-ary modulation symbolincludes log₂M bits having different reliabilities. For example, fourcoded bits form one modulation symbol with the two upper bits mapped toa high reliability and the two lower bits mapped to a low reliability in16QAM, as illustrated in FIG. 2. Two-bit cyclic shifting of the codedbits of each modulation symbol at a retransmission effects averaging thetransmission reliabilities of the coded bits, thereby improving decodingperformance.

[0029] With regard to the BIR, 16 modulation symbols each having 4 codedbits are classified into region 1 having a relatively high errorprobability, region 3 having a relatively low error probability, andregion 2 having a medium probability in 16QAM, as illustrated in FIG. 2.Inversion of the coded bits of each modulation symbol prior to symbolmapping at a retransmission also effects averaging the errorprobabilities of the coded bits and thus improves system performance atdecoding.

[0030] Despite the advantage of improved system performance, however, asimple combined use of the above techniques is not effective in theirapplication to systems. Therefore, the techniques need to be combinedeffectively so that optimum transmission efficiency can be achieved in aCDMA mobile communication system.

SUMMARY OF THE INVENTION

[0031] It is, therefore, an object of the present invention to providein a wireless communication system a transmitting/receiving apparatusand method in which packet retransmission is carried out with systemperformance increased.

[0032] It is another object of the present invention to provide in awireless communication system a transmitting/receiving apparatus andmethod that increase the reliabilities of bits at a packetretransmission.

[0033] It is also another object of the present invention to provide ina wireless communication system a transmitting/receiving apparatus andmethod for enabling a receiver to receive bits with a higher receptionprobability.

[0034] It is a further object of the present invention to provide awireless communication system supporting HARQ a transmitting/receivingapparatus and method for more efficient packet retransmission.

[0035] It is still another object of the present invention to provide anapparatus and method for efficiently combining an initial transmissiontechnique with a retransmission technique.

[0036] It is yet another object of the present invention to provide anapparatus and method for simultaneously supporting the BIR with theSRRC.

[0037] To achieve the above and other objects, according to one aspectof the present invention, upon request for a retransmission from areceiver, a transmitter generates first coded bits by invertinginitially transmitted coded bits, generates second coded bits byseparating the initially transmitted coded bits into a first bit grouphaving a relatively high priority and a second bit group having arelatively low priority and exchanging the first bit group with thesecond bit group, and generates third coded bits by inverting theexchanged coded bits. The transmitter selects one of the first codedbits, the second coded bits (according to the sequence number of aretransmission request received from the receiver), and the third codedbits, and maps the selected coded bits to modulation symbols. Thetransmitter then transmits the modulation symbols to the receiver.

[0038] According to another aspect of the present invention, uponrequest for a retransmission from a receiver, a transmitter generatesfirst coded bits by inverting initially transmitted coded bits,generates second coded bits by cyclically shifting the initiallytransmitted coded bits by a predetermined number of bits, and generatesthird coded bits by inverting the shifted coded bits. The transmitterselects one of the first coded bits, the second coded bits (according tothe sequence number of a retransmission request received from thereceiver), and the third coded bits, and maps the selected coded bits tomodulation symbols. The transmitter then transmits the modulationsymbols to the receiver.

BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and other objects, features and advantages of thepresent invention will become more apparent from the following detaileddescription when taken in conjunction with the accompanying drawings inwhich:

[0040]FIG. 1 is a block diagram of a transmitter in a typical CDMAmobile communication system;

[0041]FIG. 2 illustrates an example of a signal constellation in 16QAMin the CDMA mobile communication system;

[0042]FIG. 3 illustrates the error probabilities of regions in thesignal constellation of 16QAM;

[0043]FIG. 4 is a block diagram of a transmitter in a CDMA mobilecommunication system according to an embodiment of the presentinvention;

[0044]FIG. 5 is a detailed block diagram of a channel encoderillustrated in FIG. 4;

[0045]FIG. 6 is a flowchart illustrating the operation of thetransmitter in the CDMA mobile communication system according to anembodiment of the present invention;

[0046]FIG. 7 is a block diagram of a receiver for receiving signals fromthe transmitter illustrated in FIG. 4 in the CDMA mobile communicationsystem according to the embodiment of the present invention;

[0047]FIG. 8 is a flowchart illustrating the operation of the receiverin the CDMA mobile communication system according to an embodiment ofthe present invention;

[0048]FIG. 9 illustrates bit inversion in the transmitter according toan embodiment of the present invention;

[0049]FIG. 10 is a block diagram of a transmitter in a CDMA mobilecommunication system according to a second embodiment of the presentinvention;

[0050]FIG. 11 is a flowchart illustrating the operation of thetransmitter in the CDMA mobile communication system according to thesecond embodiment of the present invention;

[0051]FIG. 12 is a block diagram of a receiver for receiving signalsfrom the transmitter illustrated in FIG. 10 in the CDMA mobilecommunication system according to the second embodiment of the presentinvention;

[0052]FIG. 13 is a flowchart illustrating the operation of the receiverin the CDMA mobile communication system according to the secondembodiment of the present invention; and

[0053]FIG. 14 illustrates a comparison between frame error rates atretransmissions according to an embodiment of the present invention andat a retransmission according to a conventional method under an AWGNenvironment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0054] Preferred embodiments of the present invention will be describedherein below with reference to the accompanying drawings. In thefollowing description, well-known functions or constructions are notdescribed in detail since they would obscure the invention inunnecessary detail.

[0055] HARQ, to which the present invention, is applied is a linkcontrolling technique for correcting packet errors by retransmission. Asis applied from its name, retransmission is one more transmission ofinitially transmitted but failed packet data. Therefore, new data is nottransmitted at a retransmission.

[0056] As described before, HARQ techniques are divided into HARQ typeII and HARQ type III depending on whether systematic bits areretransmitted or not. The major HARQ type II is FIR, and HARQ type IIIincludes CC and PIR which are discriminated according to whether thesame parity bits are retransmitted.

[0057] The present invention as described below is applied to all of theabove HARQ techniques. In the CC, a retransmission packet has the samebits as an initial transmission packet, and in the FIR and PIR aretransmission packet and an initial transmission packet have differentbits. Since the present invention pertains to a method of increasing thetransmission efficiency of a retransmission packet, it is obviouslyapplicable to the case where an initial transmission packet is differentfrom its retransmission packet. Yet, the following description is madein the context of the CC by way of example.

[0058] The present invention can be implemented in two embodiments. In afirst embodiment, SMP (Symbol Mapping method based on Priority) iscombined with the BIR, and in a second embodiment, the SRRC is combinedwith the BIR.

[0059] First Embodiment: SMP+BIR

[0060]FIG. 4 is a block diagram of a transmitter in a CDMA mobilecommunication system according to an embodiment of the presentinvention. Referring to FIG. 4, the transmitter includes a CRC (CyclicRedundancy Check) adder 210, a channel encoder 220, a rate matchingcontroller 230, a distributor 240, an interleaver unit 250, an exchange260, a parallel-to-serial converter (PSC) 270, a bit inverter 280, amodulator 290, and a transmission controller 200.

[0061] The transmitter exchanges systematic bits with parity bits at aretransmission when necessary. Therefore, the exchange 260 is optional.

[0062] Referring to FIG. 4, the CRC adder 210 adds CRC bits to inputinformation bits for an error check on a packet data basis. The channelencoder 220 encodes the packet data with the CRC bits at a predeterminedcode rate by predetermined coding.

[0063] The packet data is coded to systematic bits and parity bits beingerror control bits for the systematic bits. Turbo coding orconvolutional coding can be used.

[0064] The code rate determines the ratio of the parity bits to thesystematic bits. With a code rate of ½, for example, the channel encoder220 outputs one systematic bit and one parity bit for the input of oneinformation bit. With a code rate of ¾, the channel encoder 220 outputsthree systematic bits and one parity bit for the input of threeinformation bits. In the embodiment of the present invention, other coderates can also be applied aside from ½ and ¾.

[0065] The rate matching controller 230 matches the data rate of thecoded bits by repetition and/or puncturing. The distributor 240separates the rate-matched bits into systematic bits and parity bits andfeeds the systematic bits to a first interleaver 252 and the parity bitsto a second interleaver 254. With a symmetrical code rate such as ½, thefirst and second interleavers 252 and 254 receive the same number ofbits. On the other hand, with an asymmetrical code rate such as ¾,systematic bits are first fed to the first interleaver 252 and theremaining systematic bits and the parity bits are then fed to the secondinterleaver 254.

[0066] The first interleaver 252 interleaves the systematic bits and thesecond interleaver 254 interleaves the parity bits in a predeterminedinterleaving method. While the first and second interleavers 252 and 254are discriminated in hardware in FIG. 4, they can also be discriminatedlogically. This means that the interleaver unit 250 uses a single memoryhaving a memory area for storing systematic bits and a memory area forstoring parity bits. The thus-constituted interleaver unit 250 operatesto map the systematic bits and the parity bits to different reliabilityparts. In other words, the SMP is achieved with the use of thedistributor 240 and the interleaver unit 250.

[0067] The interleaver outputs are stored in a buffer (not shown) foruse at retransmission. Upon request of a receiver for a retransmission,the whole or part of the buffered bits are output under the control ofthe transmission controller 200.

[0068] The coded bits, of which the sequences have been permuted by thefirst and second interleavers 252 and 254, are exchanged in the exchange260 under the control of the transmission controller 200. At an initialtransmission, the transmission controller 200 disables the exchange 260so that the first interleaver output and the second interleaver outputbypass the exchange 260. At a retransmission, the transmissioncontroller 200 determines whether to enable the exchange 260 accordingto the number of retransmission occurrences. For example, bit exchangeoccurs at each third or fourth retransmission, and no bit exchangeoccurs at each first or second retransmission.

[0069] The coded bits that have passed through the exchange 260 areconverted to a serial bit stream in the PSC 270. The bit inverter 280inverts the bits of the serial bit stream under the control of thetransmission controller 200. The transmission controller 200 enables ordisables the bit inverter 280 according to the sequence number of aretransmission. For example, the bit inverter 280 inverts the coded bitsonly at each odd-numbered retransmission. The bit inverter 280 is aninverter that inverts input bits 0 or 1.

[0070] When bit inversion is not needed, the input coded bits bypass thebit inverter 280. This bit inverter 280 functions to map coded bits to amodulation symbol with a different error probability at a retransmissionfrom that at an initial transmission, to thereby implement the BIR.

[0071] The modulator 290 modulates input coded bits in a predeterminedmodulation scheme. In 16QAM, the modulator 290 maps every four inputcoded bits to a modulation symbol having a bit reliability pattern [H,H, L, L]. H denotes a high reliability part and L denotes a lowreliability part.

[0072] The transmission controller 200 provides overall control to thecomponents of the transmitter in accordance with upper layer signaling.The transmission controller 200 determines the code rate of the channelencoder 220 and the modulation scheme of the modulator 290 according tothe current radio channel condition.

[0073] The transmission controller 200 also controls the exchange 260and the bit inverter 280 by a retransmission request from an upper layerin response for a retransmission request from a receiver. Theretransmission request information from the upper layer indicateswhether the receiver has requested a packet retransmission and how manytimes retransmission has been carried out so far.

[0074] Aside from the sequence number of a retransmission, the bitinverter 280 is enabled or disabled according to an SFN (System FrameNumber). In this case, the transmitter can determine whether to performbit inversion or not using the SFN only without the need for additionalinformation such as the sequence number of a retransmission. This isbecause modulation without inversion at an initial transmission andinversion prior to modulation at a retransmission is equivalent toinversion prior to modulation at an initial transmission and modulationwithout inversion at a retransmission. That is, it does not matterwhether bit inversion is performed at an initial transmission or at aretransmission in the present invention.

[0075]FIG. 5 is a detailed block diagram of the channel encoder 220illustrated in FIG. 4. It is assumed that the channel encoder 220 uses amother code rate of ⅙ adopted in the 3GPP (3^(rd) Generation PartnershipProject) standards.

[0076] Referring to FIG. 5, the channel encoder 220 simply outputs onedata frame of size N as a systematic bit frame X (=x₁, x₂, . . . ,x_(N)). Here, N is determined according to the code rate. A firstconstituent encoder 224 outputs two different parity bit frames Y1(=y₁₁, y₁₂, . . . , y_(1N)) and Y2 (=y₂₁, y₂₂, . . . , y_(2N)) for theinput of the data frame.

[0077] An internal interleaver 222 interleaves the data frame andoutputs an interleaved systematic bit frame X′ (=x′₁, x′₂, . . . ,x′_(N)). A second constituent encoder 226 encodes the interleavedsystematic bit frame X′ to two different parity bit frames Z1 (=z₁₁,z₁₂, . . . , z_(1N)) and Z2 (=z₂₁, z₂₂, . . . , z_(2N)).

[0078] A puncturer 228 generates intended systematic bits S and paritybits P by puncturing the systematic bit frame X, the interleavedsystematic bit frame X′, and the parity bit frames Y1, Y2, Z1 and Z2 ina puncturing pattern received from the controller 270.

[0079] The puncturing pattern is determined according to the code rateof the channel encoder 220 and an H-ARQ method used. For example, whenthe code rate is ½, puncturing patterns available in H-ARQ type III (CCand PIR) are as follows. $\begin{matrix}{P_{1} = \begin{bmatrix}1 & 1 \\1 & 0 \\0 & 0 \\0 & 0 \\0 & 0 \\0 & 1\end{bmatrix}} & (1) \\{P_{2} = \begin{bmatrix}1 & 1 \\1 & 0 \\0 & 0 \\0 & 0 \\0 & 1 \\0 & 0\end{bmatrix}} & (2)\end{matrix}$

[0080] where 1 indicates a transmission bit and 0 indicates a puncturedbit. Input bits are punctured from the left column to the right column.

[0081] One of the above puncturing patterns is used at an initialtransmission and retransmissions in the CC, while they are alternatelyused at each transmission in the PIR.

[0082] In HARQ type II (FIR), systematic bits are punctured atretransmission. In this case, a puncturing pattern is “010010”, forexample.

[0083] In the CC, if the puncturing pattern P₁ (i.e., “110000” and“100001”) is used, the puncturer 228 outputs bits X, Y1, X and Z2 withthe other bits punctured at each transmission. If the puncturing patternP₂ (i.e., “110000” and “100010”) is used, the puncturer 228 outputs bitsX, Y1, X and Z1 with the other bits punctured at each transmission.

[0084] In the PIR, the puncturer 228 outputs bits X, Y1, X and Z2 at aninitial transmission and bits X, Y1, X and Z1 at a retransmission.

[0085] Though not shown, a channel encoder using a mother code rate of ⅓adopted in the 3GPP2 is realized using one constituent encoder and apuncturer.

[0086]FIG. 6 is a flowchart illustrating the operation of thetransmitter according to the embodiment of the present invention.Referring to FIG. 6, the CRC adder 210 adds CRC bits to input data on apacket basis in step 300 and the channel encoder 220 encodes the packetdata with the CRC bits at a code rate preset between the transmitter andthe receiver in step 305.

[0087] Specifically, the input packet data is simply output as asystematic bit frame X in the channel encoder 220. The first constituentchannel encoder 224 encodes the systematic bit frame X at apredetermined code rate and outputs different parity bit frames Y1 andY2.

[0088] The internal interleaver 222 interleaves the packet data andoutputs another systematic bit frame X′. The second constituent channelencoder 226 encodes the systematic bit frame X′ and outputs twodifferent parity bit frames Z1 and Z2.

[0089] The puncturer 228 punctures the systematic bit frames X and X′and the parity bit frames Y1, Y2, Z1 and Z2 according to a desired coderate in a predetermined puncturing pattern.

[0090] As described before, the same puncturing pattern is used at aninitial transmission and retransmissions in the CC. The puncturingpattern is stored in the puncturer 228 or received from the transmissioncontroller 200. In FIG. 5, the puncturing pattern is illustrated to beexternally received.

[0091] In step 310, the rate matching controller 230 matches the rate ofthe coded bits by repetition and puncturing. The rate matchingcontroller 230 operates for transport channel multiplexing, or when thenumber of encoder output bits is different from the number of bits in atransmission frame.

[0092] In step 315, the distributor 240 separates the rate-matched bitsinto systematic bits and parity bits. If the number of the systematicbits are equal to that of the parity bits, the systematic bits and theparity bits are fed to the first and second interleavers 252 and 254,respectively. On the other hand, if they are different, the firstinterleaver 252 first receives systematic bits. The first and secondinterleavers 252 and 254 interleave the input coded bits in step 320.

[0093] The transmission controller 200 determines in step 325 whether aretransmission request command received from the upper layer indicatesthe initial transmission of a new packet or a retransmission of aprevious packet. In the case of the initial transmission of the newpacket, the procedure goes to step 340.

[0094] In the case of a retransmission of the same packet, thetransmission controller 200 calculates MOD (the sequence number of theretransmission, log₂M) in step 330. MOD denotes a modulo operation and Mindicates the modulation order used in the modulator 290. If thesolution is less than 2, the procedure jumps to step 340. On the otherhand, if the solution is equal to or greater than 2, the transmissioncontroller 200 enables the exchange 260. The exchange 260 then exchangesin step 335 the outputs of the first and second interleavers 252 and254. As a result, the systematic bits are fed to the second interleaver254, and the parity bits to the first interleaver 252.

[0095] In step 340, the PSC 270 converts the coded bits received in twopaths to a serial bit stream. The transmission controller 200 in step345 calculates MOD (the sequence number of the retransmission, 2) todetermine whether to invert the bits of the serial bit stream. If thesolution is 0, this indicates an even-numbered retransmission and if thesolution is not 0, this indicates an odd-numbered retransmission. In theformer, the transmission controller 200 disables the bit inverter 280,and in the latter, it enables the bit inverter 280. When enabled, thebit inverter 280 inverts in step 350 the bits of the serial bit stream.On the contrary, when the bit inverter is disabled, the serial bitstream is directly fed to the modulator 290 without bit inversion.

[0096] The modulator 290 maps the input bits to symbols in step 355. In16QAM, every four coded bits are mapped to a modulation symbol having areliability pattern [H, H, L, L]. The modulation symbols are spread witha predetermined spreading code and transmitted to the receiver in step360.

[0097]FIG. 7 is a block diagram of a receiver being the counterpart ofthe transmitter illustrated in FIG. 4 according to an embodiment of thepresent invention. Referring to FIG. 7, the receiver includes ademodulator 410, a bit inverter 420, a serial-to-parallel converter(SPC) 430, an exchange 440, a deinterleaver unit 450, a combiner 460, abuffer 470, a channel decoder 480, a CRC checker 490, and a receptioncontroller 400.

[0098] In operation, the demodulator 410 demodulates data received fromthe transmitter in a demodulation method corresponding to the modulationscheme used in the modulator 290. The bit inverter 420 inverts the bitsof the demodulated symbols under the control of the reception controller400. The reception controller 400 enables the bit inverter 420 only ateach odd-numbered retransmission.

[0099] The bit inverter 420 is a multiplier that selectively multiplies−1 by input bits because demodulated bits output from the demodulator410 have soft values −1 and 1. That is, the multiplier converts 1 to −1and −1 to 1 by sign inversion. Specifically, the multiplier multiplies−1 by input bits at each odd-numbered retransmission of the same packetunder the control of the reception controller 400. Thus, the multiplierperforms the same function as the inverter illustrated in FIG. 4. If thedemodulator 410 outputs coded bits expressed in hard values 0 and 1, themultiplier must be replaced with an inverter.

[0100] The SPC 430 converts the coded bits received from the bitinverter 420 to two parallel bit streams under the control of thereception controller 400. If the solution of MOD (the sequence number ofa retransmission, log₂M) is less than 2, the reception controller 400disables the exchange 440. Then the two parallel coded bit streams aredirectly fed to the deinterleaver. If the solution of MOD (the sequencenumber of a retransmission, log₂M) is equal to or greater than 2, thereception controller 400 enables the exchange 400 and the exchange 440exchanges the two parallel coded bit streams with each other.

[0101] One of the parallel coded bit streams is fed to a firstdeinterleaver 452 and the other coded bit stream, to a seconddeinterleaver 454. The first and second deinterleavers 452 and 454deinterleave the input coded bits in a deinterleaving rule correspondingto the interleaving rule used in the first and second interleavers 252and 254 of the transmitter.

[0102] The combiner 460 combines the current received coded bits of apacket with the coded bits of the same packet accumulated in the buffer470. If there are no coded bits of the same packet in the buffer 470,that is, in the case of initial transmission, the combiner 460 simplyoutputs the current received coded bits and simultaneously stores themin the buffer 470.

[0103] The channel decoder 480 recovers the coded bits received from thecombiner 460 by decoding them in a predetermined decoding method, turbodecoding here corresponding to the coding method in the channel encoder220 of the transmitter.

[0104] The CRC checker 490 extracts CRC bits from the decodedinformation bits on a packet basis and determines whether the packet haserrors using the extracted CRC bits. An upper layer processes the packetif the packet has no errors and an ACK (Acknowledgement) signal for thepacket is transmitted to the transmitter. On the contrary, if the packethas errors, an NACK (Non-Acknowledgement) signal for the packet istransmitted to the transmitter, requesting a retransmission of thepacket.

[0105] If the ACK signal is transmitted to the transmitter, the buffer470 is initialized with the coded bits of the corresponding packetdeleted. If the NACK signal is transmitted to the transmitter, the codedbits of the packet remain in the buffer 470. The reception controller400 counts transmissions of the NACK signal to determine the sequencenumber of the next retransmission and control the bit inverter 420 andthe exchange 440 correspondingly.

[0106]FIG. 8 is a flowchart illustrating the operation of the receiveraccording to an embodiment of the present invention. Referring to FIG.8, upon receipt of data on a radio transport channel in step 500, thedemodulator 410 recovers coded bits by demodulating the received data ona modulation symbol basis according to a modulation scheme presetbetween the receiver and the transmitter in step 505. In step 510, thereception controller 400 determines whether the coded bits are aninitial transmission packet or a retransmission packet.

[0107] In the case of retransmission, the reception controller 400calculates MOD (the sequence number of the retransmission, 2) in step515. If the solution is not 0, that is, if the retransmission is anodd-numbered one, the reception controller 400 enables the bit inverter420. The bit inverter 420 then inverts the coded bits in step 520. Onthe other hand, in the case of initial transmission, the receptioncontroller 400 disables the bit inverter 420 and the coded bits bypassthe bit inverter 420.

[0108] Bit inversion will be described in more detail with reference toFIG. 9. FIG. 9 illustrates a 12-bit frame with a modulation order of 16.Here, one modulation symbol has 4 bits. Referring to FIG. 9, the first,second and third modulation symbols are [0000], [1100], and [0111],respectively. When an NACK signal is received and thus a retransmissionis requested, the original bits are inverted. Thus, [0000], [1100] and[0111] are converted [1111], [0011] and [1000], respectively.

[0109] In connection with the signal constellation of FIG. 2, theinitial transmission modulation symbol [0000] in region 1 isretransmitted as [1111] in region 3. From the graphs of FIG. 3, it isnoted that the error probability of region 1 is much higher than that ofregion 3. Transmission of a specific symbol consistently in a regionwith a high error probability adversely influences system performance.However, retransmission of a symbol in a different transmission regionleads to averaging the error probabilities of bits and thus increasesdecoding performance according to the present invention.

[0110] Returning again to FIG. 8, coded bits that have passed through orbypassed the bit inverter 420 are separated into two parallel bitstreams in the SPC 430 in step 525. The reception controller 400calculates MOD (the sequence number of the retransmission, log₂M) instep 530. If the solution is less than 2, the reception controller 400disables the exchange 440 and the parallel coded bit streams aredirectly fed to the deinterleaver 450. On the other hand, if thesolution is equal to or greater than 2, the reception controller 400enables the exchange 440 and the exchange 535 exchanges the two parallelcoded bit streams with each other in step 440. The first and seconddeinterleavers 452 and 454 deinterleave the coded bit streams in twopaths in step 540.

[0111] The combiner 460 in step 545 combines the deinterleaved codedbits with coded bits of the same packet accumulated in the buffer 470.In step 550, the channel decoder 480 decodes the combined bits in adecoding method preset between the transmitter and the receiver andoutputs the original information bits.

[0112] In step 555, the CRC checker 490 determines whether the packethas errors by a CRC check on the decoded information bits on a packetbasis. If the packet has no errors, the buffer 470 is initialized and anACK signal is transmitted to the transmitter in step 560. Then thepacket is provided to the upper layer.

[0113] On the contrary, if the packet has errors, the coded bits storedin the buffer 470 are preserved and an NACK signal requesting aretransmission of the packet is transmitted to the transmitter in step565.

[0114] Packet retransmission with 16QAM used as a modulation schemeaccording to the embodiment of the present invention can be generalizedas follows:

[0115] (1) coded bits are initially transmitted;

[0116] (2) the coded bits are inverted for modulation at a firstretransmission;

[0117] (3) systematic bits are exchanged with parity bits prior tomodulation at a second retransmission;

[0118] (4) the systematic bits are exchanged with the parity bits andthen the coded bits are inverted prior to modulation at a thirdretransmission;

[0119] (5) the coded bits are modulated without modification in the samemanner as at the initial transmission at a fourth retransmission; and

[0120] (6) steps (1) to (5) are repeated upon request for the nextretransmissions.

[0121] Second Embodiment: SRRC+BIR

[0122]FIG. 10 is a block diagram of a transmitter in a CDMA mobilecommunication system according to another embodiment of the presentinvention. Referring to FIG. 10, the transmitter includes a CRC adder610, a channel encoder 620, a rate matching controller 630, aninterleaver 640, a bit rearranger 650, a bit inverter 660, a modulator670, and a transmission controller 600. The transmitter shiftsretransmission bits by a predetermined number of bits and inverts theshifted bits according to the sequence number of a retransmission.

[0123] Referring to FIG. 10, the CRC adder 610 adds CRC bits to inputinformation bits for an error check on a packet data basis. The channelencoder 620 encodes the packet data with the CRC bits at a predeterminedcode rate by predetermined coding.

[0124] The packet data is coded to systematic bits and parity bits beingerror control bits for the systematic bits. Turbo coding orconvolutional coding can be used. The detailed structure of the channelencoder 620 is illustrated in FIG. 5.

[0125] The code rate determines the ratio of the parity bits to thesystematic bits. With a code rate of ½, for example, the channel encoder620 outputs one systematic bit and one parity bit for the input of oneinformation bit. With a code rate of ¾, the channel encoder 620 outputsthree systematic bits and one parity bit for the input of threeinformation bits. In the embodiment of the present invention, other coderates can also be applied aside from ½ and ¾.

[0126] The rate matching controller 630 matches the data rate of thecoded bits by repetition or puncturing. The interleaver 640 interleavesthe rate-matched bits and the interleaver output is stored in a buffer(not shown) for use at retransmission. Upon request of a receiver for aretransmission, the whole or part of the buffered bits are output underthe control of the transmission controller 600.

[0127] The coded bits, of which the sequence has been permuted by theinterleaver 640, are shifted in the bit rearranger 650 under the controlof the transmission controller 600. The bit rearranger 650 includes ashifter for cyclically shifting input coded bits by a predeterminednumber of bits. The transmission controller 600 determines whether torearrange coded bits at the bit rearranger 650 according to the sequencenumber of a retransmission and the bit rearranger 650 rearranges thecoded bits when the transmission controller 600 commands bitrearrangement. The bit rearranger 650 implements the SRRC.

[0128] For example, the transmission controller 600 disables the bitrearranger 650 at each first or second retransmission, and enables thebit rearranger 650 at each third or fourth retransmission. In the formercase, the coded bits bypass the bit rearranger 650, and in the lattercase, the bit rearranger 650 cyclically shifts the coded bits by apredetermined number of, for example, two bits.

[0129] As described before, pairs of coded bits are mapped to differentreliability parts in 16QAM or 64QAM. Hence the bit rearranger 650cyclically shifts the coded bits of each modulation symbol by two bitsso that the coded bits can be mapped to different reliability parts at aretransmission from those at an initial transmission.

[0130] If coded bits for initial transmission are [a, b, c, d] in 16QAM,the two upper bits [a, b] are mapped to a high reliability part and thetwo lower bits [c, d], to a low reliability part. At a retransmission,the coded bits [a, b, c, d] are converted to [c, d, a, b] by two-bitcyclic shifting. The two upper bits [c, d] are mapped to have a highreliability, and the two lower bits [a, b], to have a low reliability.

[0131] The bit inverter 660 inverts the coded bits that have passedthrough or bypassed the bit rearranger 650 under the control of thetransmission controller 600. The transmission controller 600 enables ordisables the bit inverter 660 according to the sequence number of aretransmission. For example, the bit inverter 660 inverts the coded bitsonly at each odd-numbered retransmission. The bit inverter 280 is aninverter that inverts input bits 0 or 1.

[0132] When bit inversion is not needed, the input coded bits bypass thebit inverter 660. This bit inverter 660 functions to map coded bits to amodulation symbol with a different error probability at a retransmissionfrom that at an initial transmission.

[0133] The modulator 670 modulates input coded bits in a predeterminedmodulation scheme. In 16QAM, the modulator 670 maps every four inputcoded bits to a modulation symbol having a bit reliability pattern [H,H, L, L].

[0134] The transmission controller 600 provides overall control to thecomponents of the transmitter according to the second embodiment of thepresent invention. The transmission controller 600 determines the coderate of the channel encoder 620 and the modulation scheme of themodulator 670 according to the current radio channel condition. Thetransmission controller 600 also processes a retransmission request froman upper layer that has received a retransmission request from areceiver and controls the bit rearranger 650 and the bit inverter 660correspondingly.

[0135] The retransmission request information from the upper layerindicates whether the receiver has requested a packet retransmission andhow many times retransmission has been carried out so far. At aretransmission of the same packet, the bit rearranger 650 is enabledonly if MOD (the sequence number of the retransmission, log₂M) is equalto or greater than 2, and the bit inverter 660 is enabled only if MOD(the sequence number of the retransmission, 2) is 1.

[0136]FIG. 11 is a flowchart illustrating the operation of thetransmitter according to the second embodiment of the present invention.Referring to FIG. 11, the CRC adder 610 adds CRC bits to input data on apacket basis in step 700 and the channel encoder 620 encodes the packetdata with the CRC bits in step 705. In step 710, the rate matchingcontroller 630 matches the rate of the coded bits by repetition orpuncturing. The interleaver 640 interleaves the rate-matched bits instep 715.

[0137] In step 720, the transmission controller 600 determines whether aretransmission request command received from the upper layer indicatesthe initial transmission of a new packet or a retransmission of aprevious packet. In the case of the initial transmission of the newpacket, the procedure goes to step 745.

[0138] In the case of a retransmission of the same packet, thetransmission controller 600 calculates MOD (the sequence number of theretransmission, log₂M) in step 725. If the solution is equal to orgreater than 2, the procedure jumps to step 735. On the other hand, ifthe solution is less than 2, the transmission controller 600 enables thebit rearranger 650. The bit rearranger 650 then rearranges theinterleaver output by two bit-cyclic shifting in step 730.

[0139] In step 735, the transmission controller 600 calculates MOD (thesequence number of the retransmission, 2) to determine whether to enablethe bit inverter 660. If the solution is 0, this indicates aneven-numbered retransmission and if the solution is not 0, thisindicates an odd-numbered retransmission. In the former, thetransmission controller 600 disables the bit inverter 660 and in thelatter, it enables the bit inverter 660. When enabled, the bit inverter660 inverts the coded bits in step 740. On the contrary, when the bitinverter 660 is disabled, the coded bits are directly fed to themodulator 670 without bit inversion.

[0140] The modulator 670 maps the input bits to symbols in step 745. In16QAM, every four coded bits are mapped to a modulation symbol having areliability pattern [H, H, L, L]. The modulation symbols are spread witha predetermined spreading code and transmitted to the receiver in step750.

[0141]FIG. 12 is a block diagram of a receiver being the counterpart ofthe transmitter illustrated in FIG. 10 according to the secondembodiment of the present invention. Referring to FIG. 12, the receiverincludes a demodulator 810, a bit inverter 820, a bit rearranger 830, adeinterleaver unit 840, a combiner 650, a buffer 860, a channel decoder870, a CRC checker 880, and a reception controller 800.

[0142] In operation, the demodulator 810 demodulates data received fromthe transmitter in a demodulation method corresponding to the modulationscheme used in the modulator 670. The bit inverter 820 inverts the bitsof the demodulated symbols under the control of the reception controller800. The reception controller 800 enables the bit inverter 820 only ateach odd-numbered retransmission.

[0143] The bit inverter 820 is a multiplier that multiplies −1 by inputbits selectively. Specifically, the multiplier multiplies −1 by inputbits at each odd-numbered retransmission of the same packet under thecontrol of the reception controller 800. Thus, the multiplier performsthe same function as the inverter illustrated in FIG. 10. If thedemodulator 810 outputs coded bits expressed in hard values 0 and 1, themultiplier is replaced with an inverter.

[0144] The bit rearranger 830 rearranges the coded bits received fromthe bit inverter 820 under the control of the reception controller 800.If the solution of MOD (the sequence number of a retransmission, log₂M)is less than 2, the reception controller 800 disables the bit rearranger830. Then the coded bit streams are directly fed to the deinterleaver840. If the solution of MOD (the sequence number of a retransmission,log₂M) is equal to or greater than 2, the reception controller 800enables the bit rearranger 830 and the bit rearranger 830 rearranges thecoded bits by reverse cyclic shifting in correspondence to the bitrearrangement in the transmitter.

[0145] The deinterleaver 840 deinterleaves the input coded bits in adeinterleaving rule corresponding to the interleaving rule used in theinterleaver 640 of the transmitter. The combiner 850 combines thecurrent received coded bits of a packet with the coded bits of the samepacket accumulated in the buffer 860. If there are no coded bits of thesame packet in the buffer 860, that is, in the case of initialtransmission, the combiner 850 simply outputs the current received codedbits and simultaneously stores them in the buffer 860.

[0146] The channel decoder 870 recovers the coded bits received from thecombiner 850 by decoding them in a predetermined decoding methodcorresponding to the coding method in the channel encoder 620 of thetransmitter. By decoding, systematic bits are decoded for the input ofthe systematic bits and parity bits.

[0147] The CRC checker 880 extracts CRC bits from the decodedinformation bits on a packet basis and determines whether the packet haserrors using the extracted CRC bits. If the packet has no errors, an ACKsignal for the packet is transmitted to the transmitter. On thecontrary, if the packet has errors, an NACK (Non-Acknowledgement) signalfor the packet is transmitted to the transmitter, requesting aretransmission of the packet.

[0148] If the ACK signal is transmitted to the transmitter, the buffer860 is initialized with the coded bits of the corresponding packetdeleted. If the NACK signal is transmitted to the transmitter, the codedbits of the packet remain in the buffer 870. The reception controller800 counts transmissions of the NACK signal to determine the sequencenumber of the next retransmission and control the bit inverter 820 andthe bit rearranger 830 correspondingly.

[0149]FIG. 13 is a flowchart illustrating the operation of the receiveraccording to the second embodiment of the present invention. Referringto FIG. 13, upon receipt of data on a radio transport channel in step900, the demodulator 810 recovers coded bits by demodulating thereceived data on a modulation symbol basis according to a modulationscheme preset between the receiver and the transmitter in step 905. Instep 910, the reception controller 800 determines whether the coded bitsare an initial transmission packet or a retransmission packet. In thecase of initial transmission, the reception controller 800 disables thebit inverter 820 and the coded bits bypass the bit inverter 820.

[0150] In the case of retransmission, the reception controller 800calculates MOD (the sequence number of the retransmission, 2) in step915. If the solution is not 0, that is, if the retransmission is anodd-numbered one, the reception controller 800 enables the bit inverter820. The bit inverter 820 then inverts the coded bits in step 920.

[0151] In step 925, the reception controller 800 calculates MOD (thesequence number of the retransmission, log₂M). If the solution is lessthan 2, the reception controller 800 disables the bit rearranger 830 andthe coded bits are directly fed to the deinterleaver 840. On the otherhand, if the solution is equal to or greater than 2, the receptioncontroller 800 enables the bit rearranger 830 and the bit rearranger 830rearranges the coded bits by reverse cyclic shifting in correspondenceto the bit rearrangement in the bit rearranger 650 of the transmitter instep 930.

[0152] The deinterleaver 840 deinterleaves the input coded bits in adeinterleaving method corresponding to the interleaving in theinterleaver 640 in step 935, and the combiner 850 combines thedeinterleaved coded bits with coded bits of the same packet accumulatedin the buffer 860 in step 940. In step 945, the channel decoder 870decodes the combined bits in a decoding method preset between thetransmitter and the receiver and outputs the original information bits.

[0153] In step 950, the CRC checker 880 determines whether the packethas errors by a CRC check on the decoded information bits on a packetbasis. If the packet has no errors, the buffer 860 is initialized and anACK signal is transmitted to the transmitter in step 955. Then thepacket is provided to the upper layer. On the contrary, if the packethas errors, the coded bits stored in the buffer 860 are preserved and anNACK signal requesting a retransmission of the packet is transmitted tothe transmitter in step 960.

[0154] Packet retransmission with 16QAM used as a modulation schemeaccording to the second embodiment of the present invention can begeneralized as follows:

[0155] (1) coded bits are initially transmitted;

[0156] (2) the coded bits are inverted for modulation at a firstretransmission;

[0157] (3) the coded bits are shifted by two bits prior to modulation ata second retransmission;

[0158] (4) the coded bits are shifted by two bits and then invertedprior to modulation at a third retransmission;

[0159] (5) the coded bits are modulated without modification in the samemanner as at the initial transmission at a fourth retransmission; and

[0160] (6) steps (1) to (5) are repeated upon request for the nextretransmissions.

[0161]FIG. 14 illustrates graphs comparing throughputs ofretransmissions according to the present invention and a conventionalmethod in terms of frame error rates under an AWGN environment.Referring to FIG. 14, PRIOR ART denotes a retransmission according tothe conventional method, BIR+SMP denotes a retransmission according tothe first embodiment of the present invention, and BIR+SRRC denotes aretransmission according to the second embodiment of the presentinvention. As noted from FIG. 14, BIR+SRRC brings a 0.5 to 1 dB errorrate decrease and BIR+SMP brings an up to 2.5 dB error rate decrease, ascompared to the conventional method.

[0162] In accordance with the present invention as described above, acombined use of BIR and SMP or BIR and SRRC effects a remarkableperformance improvement without modifying the conventional packetretransmission method. Therefore, the reliabilities and errorprobabilities of transmitted bits are averaged at retransmission,decoding performance is improved, and transmission efficiency isincreased.

[0163] The present invention is applicable to all transmittersirrespective of wireless or wired communication, and it can be expectedthat the overall system performance will be significantly improvedwithout an increase in system complexity. That is, a decrease in BERfrom the existing systems leads to an increase in transmissionthroughput. By application of the present invention, retransmissiontechniques are effectively combined, not to speak of an effectivecombination of an initial transmission technique and a retransmissiontechnique, creating a synergy of benefits.

[0164] While the invention has been shown and described with referenceto certain preferred embodiments thereof, it will be understood by thoseskilled in the art that various changes in form and details may be madetherein without departing from the spirit and scope of the invention asdefined by the appended claims.

What is claimed is:
 1. A method of retransmitting in a transmitter of amobile communication system coded bits upon request for a retransmissionfrom a receiver, the transmitter encodes a packet data stream to codedbits at a predetermined code rate, maps the coded bits to modulationsymbols in a predetermined modulation scheme, and transmits themodulation symbols on a transport channel to the receiver, the methodcomprising the step of: generating first coded bits by inverting thecoded bits; generating second coded bits by separating the coded bitsinto a first bit group having a relatively high priority and a secondbit group having a relatively low priority, and exchanging the first bitgroup with the second bit group; generating third coded bits byinverting the exchanged coded bits; mapping one of the first coded bits,the second coded bits, and the third coded bits to modulation symbolsaccording to the number of times of a retransmission request receivedfrom the receiver; and transmitting the modulation symbols to thereceiver.
 2. The method of claim 1, wherein if MOD (the sequence numberof the retransmission, log₂modualtion order M) is 1, the first codedbits are selected, if MOD is 2, the second coded bits are selected, andif MOD is 3, the third coded bits are selected.
 3. The method of claim2, wherein the modulation order M is one of 16 and
 64. 4. A method ofretransmitting in a transmitter of a mobile communication system codedbits upon request for a retransmission from a receiver, the transmitterencodes a packet data stream to coded bits at a predetermined code rate,maps the coded bits to modulation symbols in a predetermined modulationscheme, and transmits the modulation symbols on a transport channel tothe receiver, the method comprising the step of: generating first codedbits by inverting the coded bits; generating second coded bits bycyclically shifting the coded bits by a predetermined number of bits;generating third coded bits by inverting the shifted coded bits; mappingone of the first coded bits, the second coded bits, and the third codedbits to modulation symbols according to the sequence number of aretransmission request received from the receiver; and transmitting themodulation symbols to the receiver.
 5. The method of claim 4, wherein ifMOD (the sequence number of the retransmission, log₂modualtion order M)is 1, the first coded bits are selected, if MOD is 2, the second codedbits are selected, and if MOD is 3, the third coded bits are selected.6. The method of claim 5, wherein the modulation order M is one of 16and
 64. 7. A method of retransmitting in a transmitter of a mobilecommunication system coded bits upon request for a retransmission from areceiver, the transmitter encodes a packet data stream to coded bits ata predetermined code rate, separates the coded bits into a first grouphaving a relatively high priority and a second group having a relativelylow priority, respectively maps the bits of the first group and the bitsof the second group to a relatively high reliability part and arelatively low reliability part, in modulation symbols in apredetermined modulation scheme, and transmits the modulation symbols ona transport channel to the receiver, the method comprising the step of:inverting the bits of the first and second groups upon request for aretransmission of the coded bits from the receiver; mapping the invertedfirst group to the relatively high reliability part and the invertedsecond group to the relatively low reliability part in modulationsymbols; and transmitting the modulation symbols to the receiver.
 8. Themethod of claim 7, wherein the coded bits are inverted if the sequencenumber of the retransmission request is odd-numbered in the bitinversion step.
 9. The method of claim 7, further comprising the step ofexchanging the bits of the first group with the bits of the second groupbefore the bit inversion step upon request for another retransmission ofthe coded bits from the receiver.
 10. The method of claim 9, wherein thebits of the first group are exchanged with the bits of the second groupif MOD (the sequence number of the retransmission request,log₂modulation order M) is less than
 2. 11. The method of claim 10,wherein the modulation order M is one of 16 and
 64. 12. A method ofretransmitting in a transmitter of a mobile communication system codedbits upon request for a retransmission from a receiver, the transmitterencodes a packet data stream to coded bits at a predetermined code rate,maps the coded bits to modulation symbols in a predetermined modulationscheme, and transmits the modulation symbols on a transport channel tothe receiver, the method comprising the step of: rearranging the codedbits in a predetermined rearrangement pattern upon request of aretransmission of the coded bits from the receiver; inverting therearranged coded bits; mapping the inverted coded bits to modulationsymbols; and transmitting the modulation symbols to the receiver. 13.The method of claim 12, wherein the coded bits are inverted if thesequence number of the retransmission request is odd-numbered in the bitinversion step.
 14. The method of claim 12, wherein the coded bits to bemapped to each modulation symbol are cyclically shifted by apredetermined number of bits in the rearrangement step.
 15. The methodof claim 14, wherein the coded bits are rearranged if MOD (the sequencenumber of the retransmission request, log₂modulation order M) is lessthan
 2. 16. The method of claim 14, wherein the modulation order M isone of 16 and
 64. 17. An apparatus for retransmitting in a transmitterof a mobile communication system coded bits upon request for aretransmission from a receiver, the transmitter encodes a packet datastream to coded bits at a predetermined code rate, maps the coded bitsto modulation symbols in a predetermined modulation scheme, andtransmits the modulation symbols on a transport channel to the receiver,the apparatus comprising: a distributor for separating the coded bitsinto a first group having a relatively high priority and a second grouphaving a relatively low priority; an interleaver for separatelyinterleaving the first group and the second group; a bit inverter forinverting the interleaved bits upon request for a retransmission of thecoded bits from the receiver; and a modulator for mapping the invertedfirst group to a relatively high reliability part and the invertedsecond group to a relatively low reliability part in modulation symbols.18. The apparatus of claim 17, wherein the bit inverter inverts theinterleaved bits if the number of the retransmission request is an oddnumber.
 19. The apparatus of claim 17, wherein the interleaver unitincludes a first interleaver for interleaving the bits of the firstgroup and a second interleaver for interleaving the bits of the secondgroup.
 20. The apparatus of claim 19, further comprising aparallel-to-serial converter for converting the outputs of the first andsecond interleavers to a serial bit stream.
 21. The apparatus of claim17, further comprising an exchange for exchanging the interleaved firstgroup with the interleaved second group upon request for anotherretransmission of the coded bits from the receiver.
 22. The apparatus ofclaim 21, wherein the exchange exchanges the interleaved first groupwith the interleaved second group if MOD (the sequence number of theretransmission request, log₂modulation order M) is less than
 2. 23. Theapparatus of claim 22, wherein the modulation order M is one of 16 and64.
 24. An apparatus for retransmitting in a transmitter of a mobilecommunication system coded bits upon request for a retransmission from areceiver, the transmitter encodes a packet data stream to coded bits ata predetermined code rate, maps the coded bits to modulation symbols ina predetermined modulation scheme, and transmits the modulation symbolson a transport channel to the receiver, the apparatus comprising: a bitrearranger for rearranging the coded bits in a predeterminedrearrangement pattern upon request for a retransmission of the codedbits from the receiver; a bit inverter for inverting the rearrangedbits; and a modulator for mapping the inverted bits to modulationsymbols.
 25. The apparatus of claim 24, wherein the bit inverter invertsthe rearranged bits if the number of the retransmission request is anodd number.
 26. The apparatus of claim 24, wherein the bit rearrangercyclically shifts the coded bits mapped to each modulation symbol by apredetermined number of bits.
 27. The apparatus of claim 26, wherein thebit rearranger rearranged the coded bits if MOD (the sequence number ofthe retransmission request, log₂modulation order M) is less than
 2. 28.The apparatus of claim 26, wherein the modulation order M is one of 16and
 64. 29. A method of receiving in a receiver of a mobilecommunication system coded bits transmitted from a transmitter, thetransmitter separates the coded bits into a first group having arelatively high priority and a second group having a relatively lowpriority, inverts the bits of the first and second groups, respectivelymaps the inverted first group bits and the inverted second group bits toa relatively high reliability part and a relatively low reliabilitypart, in modulation symbols in a predetermined modulation scheme, andtransmits the modulation symbols to the receiver, upon request for aretransmission of the coded bits from the receiver, the methodcomprising the step of: demodulating data received in correspondencewith a transmitted retransmission request and outputting coded bits;inverting the coded bits; separating the inverted coded bits into thefirst group having the relatively high priority and the second grouphaving the relatively low priority; and decoding the bits of the firstand second groups at a predetermined code rate.
 30. The method of claim29, wherein the coded bits are inverted if the coded bits are receivedafter an odd-numbered retransmission request of the same data istransmitted to the transmitter.
 31. The method of claim 29, furthercomprising the step of exchanging the bits of the first group with thebits of the second group before the decoding step.
 32. The method ofclaim 31, wherein the bits of the first group are exchanged with thebits of the second group if MOD (the sequence number of theretransmission request, log₂modulation order M) is less than
 2. 33. Themethod of claim 29, wherein the first group bits are combined withpreviously buffered first group bits and the second group bits arecombined with previously buffered second group bits in the decodingstep.
 34. A method of receiving in a receiver of a mobile communicationsystem coded bits from a transmitter, the transmitter rearranges thecoded bits in a predetermined rearrangement pattern, inverts therearranged bits, maps the inverted bits to modulation symbols in apredetermined modulation scheme, and transmits the modulation symbols tothe receiver, upon request for a retransmission of the coded bits fromthe receiver, the method comprising the step of: demodulating datareceived in correspondence with a transmitted retransmission request andoutputting coded bits; inverting the coded bits; rearranging theinverted coded bits in an inverse rearrangement pattern corresponding tothe rearrangement pattern; and decoding the rearranged bits at apredetermined code rate.
 35. The method of claim 34, wherein the codedbits are inverted if the coded bits are received after an odd-numberedretransmission request of the same data is transmitted to thetransmitter.
 36. The method of claim 34, wherein the coded bitsdemodulated from each modulation symbol are cyclically shifted by apredetermined number of bits in the rearrangement step.
 37. The methodof claim 36, wherein the inverted bits are rearranged if MOD (thesequence number of the retransmission request, log₂modulation order M)is less than 2 in the rearrangement step.
 38. The method of claim 34,wherein the rearranged bits are combined with previously buffered codedbits of the same data in the decoding step.
 39. An apparatus forreceiving in a receiver of a mobile communication system coded bits froma transmitter, the transmitter separates the coded bits into a firstgroup having a relatively high priority and a second group having arelatively low priority, inverts the bits of the first and secondgroups, respectively maps the inverted first group bits and the invertedsecond group bits to a relatively high reliability part and a relativelylow reliability part, in modulation symbols in a predeterminedmodulation scheme, and transmits the modulation symbols to the receiver,upon request for a retransmission of the coded bits from the receiver,the apparatus comprising: a demodulator for demodulating data receivedin correspondence with a transmitted retransmission request andoutputting coded bits; a bit inverter for inverting the coded bits; aserial-to-parallel converter for separating the inverted coded bits intothe first group having the relatively high priority and the second grouphaving the relatively low priority; a deinterleaver unit fordeinterleaving the first group bits and the second group bits,separately; and a decoder for decoding the deinterleaved bits at apredetermined code rate.
 40. The apparatus of claim 39, wherein the bitinverter inverts the coded bits if the coded bits are received after anodd-numbered retransmission request of the same data is transmitted tothe transmitter.
 41. The apparatus of claim 39, wherein thedeinterleaver unit includes a first deinterleaver for deinterleaving thefirst group bits and a second deinterleaver for deinterleaving thesecond group bits.
 42. The apparatus of claim 39, further comprising anexchange for exchanging the bits of the first group with the bits of thesecond group and outputting the exchanged bits to the interleaver. 43.The apparatus of claim 42, wherein the exchange exchanges the firstgroup bits with the second group bits if MOD (the sequence number of theretransmission request, log₂modulation order M) is less than
 2. 44. Theapparatus of claim 39, further comprising a combiner for combining thedeinterleaved first group bits with previously buffered first group bitsand the deinterleaved second group bits with previously buffered secondgroup bits and outputting the combined bits to the decoder.
 45. Anapparatus for receiving in a receiver of a mobile communication systemcoded bits from a transmitter, the transmitter rearranges the coded bitsin a predetermined rearrangement pattern, inverts the rearranged bits,maps the inverted bits to modulation symbols in a predeterminedmodulation scheme, and transmits the modulation symbols to the receiver,upon request for a retransmission of the coded bits from the receiver,the apparatus comprising: a demodulator for demodulating data receivedin correspondence with a transmitted retransmission request andoutputting coded bits; a bit inverter for inverting the coded bits; abit rearranger for rearranging the inverted coded bits in an inverserearrangement pattern corresponding to the rearrangement pattern; and adecoder for decoding the rearranged bits at a predetermined code rate.46. The apparatus of claim 45, wherein the bit inverter inverts thecoded bits if the coded bits are received after an odd-numberedretransmission request of the same data is transmitted to thetransmitter.
 47. The apparatus of claim 45, wherein the bit rearrangercyclically shifts the inverted bits by a predetermined number of bits.48. The apparatus of claim 47, wherein the bit rearranger rearranges theinverted bits if MOD (the sequence number of the retransmission request,log₂modulation order M) is less than
 2. 49. The apparatus of claim 45,further comprising a combiner for combining the rearranged bits withpreviously buffered coded bits of the same data and outputting thecombined bits to the decoder.